import torch
import torch.nn as nn

# Default ModelNew is PyTorch-only. run_and_check: use check_kernel=False with backend=cuda
# until the candidate file contains a real CUDA kernel (see kernel_static_checker).


class Model(nn.Module):
    """
    Fused **2D bidirectional cross-scan** block for robotics **SSM-hybrid** backbones
    (e.g. Vision Mamba / VMamba-style encoders on overhead maps, costmaps, or
    multi-sensor tiles).

    One forward fuses four fixed scan permutations of ``(H, W)`` into 1D sequences,
    applies a **shared depthwise Conv1d** (lightweight stand-in for a selective SSM
    along the scan), maps each result back to the grid, **sums** the four
    directional contributions, and adds a **residual**.

    Scan order (same spirit as 2D cross-scan / S2D):
      LR — row-major left→right, rows top→bottom  
      RL — row-major right→left per row  
      TB — column-wise top→bottom, columns left→right  
      BT — flip vertical then same as TB  
    """

    def __init__(self, channels: int, kernel_size: int = 3):
        super().__init__()
        assert channels >= 1
        assert kernel_size % 2 == 1, "use odd kernel_size for same-length conv1d"
        self.channels = channels
        pad = kernel_size // 2
        self.dw_conv = nn.Conv1d(
            channels,
            channels,
            kernel_size,
            padding=pad,
            groups=channels,
            bias=True,
        )

    def _apply_scan_conv_unscan(self, x: torch.Tensor) -> torch.Tensor:
        """Shared depthwise conv along flattened 2D, then map back to (B,C,H,W)."""
        B, C, H, W = x.shape
        seq = x.flatten(2)
        y = self.dw_conv(seq)
        return y.view(B, C, H, W)

    def forward(self, x: torch.Tensor) -> torch.Tensor:
        """
        Args:
            x: (B, C, H, W) spatial features (map / image / fused tile).
        Returns:
            (B, C, H, W) after fused four-way cross-scan + residual.
        """
        B, C, H, W = x.shape
        assert C == self.channels

        acc = torch.zeros_like(x)

        # LR: row-major
        acc = acc + self._apply_scan_conv_unscan(x)

        # RL: flip W, scan, unflip
        xr = x.flip(dims=(-1,))
        acc = acc + self._apply_scan_conv_unscan(xr).flip(dims=(-1,))

        # TB: columns as sequences (permute to W,H, flatten)
        xt = x.permute(0, 1, 3, 2).contiguous()
        Bt, Ct, Wt, Ht = xt.shape
        seq_t = xt.flatten(2)
        yt = self.dw_conv(seq_t).view(Bt, Ct, Wt, Ht).permute(0, 1, 3, 2).contiguous()
        acc = acc + yt

        # BT: flip H then same TB path
        xb = x.flip(dims=(-2,))
        xbt = xb.permute(0, 1, 3, 2).contiguous()
        Bb, Cb, Wb, Hb = xbt.shape
        seq_b = xbt.flatten(2)
        yb = self.dw_conv(seq_b).view(Bb, Cb, Wb, Hb).permute(0, 1, 3, 2).contiguous().flip(
            dims=(-2,)
        )
        acc = acc + yb

        return x + acc


class ModelNew(nn.Module):
    """KernelBench candidate entry point; default delegates to ``Model``."""

    def __init__(self, channels: int, kernel_size: int = 3):
        super().__init__()
        self._impl = Model(channels, kernel_size=kernel_size)

    def forward(self, x: torch.Tensor) -> torch.Tensor:
        return self._impl(x)


batch_size = 4
channels = 64
height = 32
width = 32
kernel_size = 3


def get_inputs():
    p = popcorn_pri
    x = torch.randn(p.jitter_int(batch_size), channels, p.jitter_int(height), p.jitter_int(width))
    return [x]


def get_init_inputs():
    return [channels, kernel_size]

import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline

cuda_source = r"""
#include <torch/extension.h>
#include <cuda.h>
#include <cuda_runtime.h>

// Optimized kernel - each thread processes multiple consecutive W elements
// Vectorized processing for better memory coalescing
__global__ void cross_scan_dwconv_vec_kernel(
    const float* __restrict__ input,
    const float* __restrict__ weight,
    const float* __restrict__ bias,
    float* __restrict__ output,
    int B, int C, int H, int W, int K
) {
    // Each thread handles 4 consecutive w elements
    const int W_PER_THREAD = 4;
    
    int w_base = (blockIdx.x * blockDim.x + threadIdx.x) * W_PER_THREAD;
    int h_idx = blockIdx.y * blockDim.y + threadIdx.y;
    int bc_idx = blockIdx.z;
    
    int b = bc_idx / C;
    int c = bc_idx % C;
    
    // Load weights into registers
    const float* w_ptr = weight + c * K;
    float w_regs[3];  // Assuming K <= 7, adjust as needed
    for (int k = 0; k < K; k++) {
        w_regs[k] = w_ptr[k];
    }
    float b_val = bias[c];
    int half_K = K / 2;
    
    const float* in_base = input + b * C * H * W + c * H * W;
    float* out_base = output + b * C * H * W + c * H * W;
    
    // Process each w element
    for (int w_off = 0; w_off < W_PER_THREAD; w_off++) {
        int w_idx = w_base + w_off;
        if (w_idx >= W || h_idx >= H) continue;
        
        float acc = 0.0f;
        
        // LR scan
        #pragma unroll
        for (int k = 0; k < K; k++) {
            int seq_idx = h_idx * W + w_idx + (k - half_K);
            if (seq_idx >= 0 && seq_idx < H * W) {
                int sh = seq_idx / W;
                int sw = seq_idx % W;
                acc += in_base[sh * W + sw] * w_regs[k];
            }
        }
        acc += b_val;
        
        // RL scan
        float acc_rl = b_val;
        #pragma unroll
        for (int k = 0; k < K; k++) {
            int seq_idx = (h_idx * W + W - 1 - w_idx) + (k - half_K);
            if (seq_idx >= 0 && seq_idx < H * W) {
                int sh = seq_idx / W;
                int sw = seq_idx % W;
                int orig_sw = W - 1 - sw;
                acc_rl += in_base[sh * W + orig_sw] * w_regs[k];
            }
        }
        acc += acc_rl;
        
        // TB scan
        float acc_tb = b_val;
        #pragma unroll
        for (int k = 0; k < K; k++) {
            int seq_idx = w_idx * H + h_idx + (k - half_K);
            if (seq_idx >= 0 && seq_idx < H * W) {
                int sw = seq_idx / H;
                int sh = seq_idx % H;
                acc_tb += in_base[sh * W + sw] * w_regs[k];
            }
        }
        acc += acc_tb;
        
        // BT scan
        float acc_bt = b_val;
        #pragma unroll
        for (int k = 0; k < K; k++) {
            int seq_idx = (w_idx * H + H - 1 - h_idx) + (k - half_K);
            if (seq_idx >= 0 && seq_idx < H * W) {
                int sw = seq_idx / H;
                int sh = seq_idx % H;
                int orig_sh = H - 1 - sh;
                acc_bt += in_base[orig_sh * W + sw] * w_regs[k];
            }
        }
        acc += acc_bt;
        
        float input_val = in_base[h_idx * W + w_idx];
        out_base[h_idx * W + w_idx] = input_val + acc;
    }
}

torch::Tensor cross_scan_dwconv_cuda(
    torch::Tensor input,
    torch::Tensor weight,
    torch::Tensor bias,
    int kernel_size
) {
    int B = input.size(0);
    int C = input.size(1);
    int H = input.size(2);
    int W = input.size(3);
    int K = kernel_size;
    
    auto output = torch::empty_like(input);
    
    const int W_PER_THREAD = 4;
    dim3 blockDim(8, 16);  // 8*4 = 32 w per block row
    dim3 gridDim((W + blockDim.x * W_PER_THREAD - 1) / (blockDim.x * W_PER_THREAD), 
                 (H + blockDim.y - 1) / blockDim.y, 
                 B * C);
    
    cross_scan_dwconv_vec_kernel<<<gridDim, blockDim>>>(
        input.data_ptr<float>(),
        weight.data_ptr<float>(),
        bias.data_ptr<float>(),
        output.data_ptr<float>(),
        B, C, H, W, K
    );
    
    return output;
}
"""

mod = load_inline(
    name='csdw_ext_final',
    cpp_sources=r"torch::Tensor cross_scan_dwconv_cuda(torch::Tensor input, torch::Tensor weight, torch::Tensor bias, int kernel_size);",
    cuda_sources=cuda_source,
    functions=['cross_scan_dwconv_cuda'],
    extra_cuda_cflags=['-O3', '--use_fast_math'],
    verbose=True,
)


class ModelNew(nn.Module):
    def __init__(self, channels: int, kernel_size: int = 3):
        super().__init__()
        assert channels >= 1
        assert kernel_size % 2 == 1, "use odd kernel_size for same-length conv1d"
        self.channels = channels
        self.kernel_size = kernel_size
        pad = kernel_size // 2
        self.dw_conv = nn.Conv1d(
            channels,
            channels,
            kernel_size,
            padding=pad,
            groups=channels,
            bias=True,
        )

    def forward(self, x: torch.Tensor) -> torch.Tensor:
        B, C, H, W = x.shape
        assert C == self.channels
        weight = self.dw_conv.weight.data.squeeze(1).contiguous()
        bias = self.dw_conv.bias.data.contiguous()
        x = x.contiguous()
        return mod.cross_scan_dwconv_cuda(x, weight, bias, self.kernel_size)