call → compile_kernel
callcompile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n\ncpp_src = r\"\"\"\n#include <torch/extension.h>\ntorch::Tensor depthwise_conv1d_forward(torch::Tensor x, torch::Tensor weight, torch::Tensor bias, int64_t stride, int64_t padding);\n\"\"\"\n\ncuda_src = r\"\"\"\n#include <torch/extension.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n\nconstexpr int BLOCK = 256;\n\n__global__ void dwconv1d_k3_512_8192_vec4_kernel(const float* __restrict__ x,\n const float* __restrict__ w,\n const float* __restrict__ bias,\n float* __restrict__ y,\n int has_bias) {\n int c = blockIdx.x;\n int base = ((blockIdx.y << 9) + c) << 13; // (b*512+c)*8192\n const float w0 = w[c * 3 + 0];\n const float w1 = w[c * 3 + 1];\n const float w2 = w[c * 3 + 2];\n const float bv = has_bias ? bias[c] : 0.0f;\n const float4* __restrict__ x4 = reinterpret_cast<const float4*>(x + base);\n float4* __restrict__ y4 = reinterpret_cast<float4*>(y + base);\n #pragma unroll 8\n for (int vg = threadIdx.x; vg < 2048; vg += BLOCK) {\n int i = vg << 2;\n float4 xv = x4[vg];\n float left = (i > 0) ? x[base + i - 1] : 0.0f;\n float right = (i < 8188) ? x[base + i + 4] : 0.0f;\n float4 out;\n out.x = left * w0 + xv.x * w1 + xv.y * w2 + bv;\n out.y = xv.x * w0 + xv.y * w1 + xv.z * w2 + bv;\n out.z = xv.y * w0 + xv.z * w1 + xv.w * w2 + bv;\n out.w = xv.z * w0 + xv.w * w1 + right * w2 + bv;\n y4[vg] = out;\n }\n}\n\n__global__ void dwconv1d_k3s1p1_vec4_kernel(const float* __restrict__ x,\n const float* __restrict__ w,\n const float* __restrict__ bias,\n float* __restrict__ y,\n int C, int L, int has_bias) {\n int c = blockIdx.x;\n int b = blockIdx.y;\n int base = (b * C + c) * L;\n const float w0 = w[c * 3 + 0];\n const float w1 = w[c * 3 + 1];\n const float w2 = w[c * 3 + 2];\n const float bv = has_bias ? bias[c] : 0.0f;\n const float4* __restrict__ x4 = reinterpret_cast<const float4*>(x + base);\n float4* __restrict__ y4 = reinterpret_cast<float4*>(y + base);\n int vecL = L >> 2;\n for (int vg = threadIdx.x; vg < vecL; vg += BLOCK) {\n int i = vg << 2;\n float4 xv = x4[vg];\n float left = (i > 0) ? x[base + i - 1] : 0.0f;\n float right = (i + 4 < L) ? x[base + i + 4] : 0.0f;\n float4 out;\n out.x = left * w0 + xv.x * w1 + xv.y * w2 + bv;\n out.y = xv.x * w0 + xv.y * w1 + xv.z * w2 + bv;\n out.z = xv.y * w0 + xv.z * w1 + xv.w * w2 + bv;\n out.w = xv.z * w0 + xv.w * w1 + right * w2 + bv;\n y4[vg] = out;\n }\n}\n\n__global__ void dwconv1d_k3s1p1_scalar_kernel(const float* __restrict__ x,\n const float* __restrict__ w,\n const float* __restrict__ bias,\n float* __restrict__ y,\n int C, int L, int has_bias) {\n int c = blockIdx.x;\n int b = blockIdx.y;\n int base = (b * C + c) * L;\n const float w0 = w[c * 3 + 0];\n const float w1 = w[c * 3 + 1];\n const float w2 = w[c * 3 + 2];\n const float bv = has_bias ? bias[c] : 0.0f;\n for (int idx = threadIdx.x; idx < L; idx += BLOCK) {\n float l = (idx > 0) ? x[base + idx - 1] : 0.0f;\n float m = x[base + idx];\n float r = (idx + 1 < L) ? x[base + idx + 1] : 0.0f;\n y[base + idx] = l * w0 + m * w1 + r * w2 + bv;\n }\n}\n\n__global__ void dwconv1d_generic_kernel(const float* __restrict__ x,\n const float* __restrict__ w,\n const float* __restrict__ bias,\n float* __restrict__ y,\n int B, int C, int L, int K, int outL,\n int stride, int padding, int has_bias) {\n int linear = blockIdx.x * blockDim.x + threadIdx.x;\n int total = B * C * outL;\n if (linear >= total) return;\n int pos = linear % outL;\n int tmp = linear / outL;\n int c = tmp % C;\n int b = tmp / C;\n int xbase = (b * C + c) * L;\n float acc = has_bias ? bias[c] : 0.0f;\n int in0 = pos * stride - padding;\n int wbase = c * K;\n for (int k = 0; k < K; ++k) {\n int ix = in0 + k;\n if ((unsigned)ix < (unsigned)L) acc += x[xbase + ix] * w[wbase + k];\n }\n y[linear] = acc;\n}\n\ntorch::Tensor depthwise_conv1d_forward(torch::Tensor x, torch::Tensor weight, torch::Tensor bias, int64_t stride64, int64_t padding64) {\n c10::cuda::CUDAGuard device_guard(x.device());\n TORCH_CHECK(x.is_cuda() && weight.is_cuda(), \"CUDA tensors required\");\n TORCH_CHECK(x.scalar_type() == at::kFloat && weight.scalar_type() == at::kFloat, \"float32 required\");\n TORCH_CHECK(x.is_contiguous() && weight.is_contiguous(), \"contiguous required\");\n int B = (int)x.size(0), C = (int)x.size(1), L = (int)x.size(2);\n int K = (int)weight.size(2), stride = (int)stride64, padding = (int)padding64;\n int outL = (L + 2 * padding - K) / stride + 1;\n auto y = torch::empty({B, C, outL}, x.options());\n int has_bias = bias.numel() > 0;\n const float* bptr = has_bias ? bias.data_ptr<float>() : nullptr;\n cudaStream_t stream = at::cuda::getCurrentCUDAStream();\n if (K == 3 && stride == 1 && padding == 1 && outL == L) {\n dim3 grid(C, B);\n if (C == 512 && L == 8192) dwconv1d_k3_512_8192_vec4_kernel<<<grid, BLOCK, 0, stream>>>(x.data_ptr<float>(), weight.data_ptr<float>(), bptr, y.data_ptr<float>(), has_bias);\n else if ((L & 3) == 0) dwconv1d_k3s1p1_vec4_kernel<<<grid, BLOCK, 0, stream>>>(x.data_ptr<float>(), weight.data_ptr<float>(), bptr, y.data_ptr<float>(), C, L, has_bias);\n else dwconv1d_k3s1p1_scalar_kernel<<<grid, BLOCK, 0, stream>>>(x.data_ptr<float>(), weight.data_ptr<float>(), bptr, y.data_ptr<float>(), C, L, has_bias);\n } else {\n int total = B * C * outL;\n int threads = 256;\n int blocks = (total + threads - 1) / threads;\n dwconv1d_generic_kernel<<<blocks, threads, 0, stream>>>(x.data_ptr<float>(), weight.data_ptr<float>(), bptr, y.data_ptr<float>(), B, C, L, K, outL, stride, padding, has_bias);\n }\n return y;\n}\n\"\"\"\n\n_ext = load_inline(name=\"dwconv1d_ext_v4\", cpp_sources=cpp_src, cuda_sources=cuda_src,\n functions=[\"depthwise_conv1d_forward\"], extra_cflags=[\"-O3\"],\n extra_cuda_cflags=[\"-O3\", \"--use_fast_math\"], verbose=False)\n\nclass ModelNew(nn.Module):\n def __init__(self, channels: int, kernel_size: int, stride: int = 1, padding: int = 0, bias: bool = False):\n super(ModelNew, self).__init__()\n self.conv1d = nn.Conv1d(channels, channels, kernel_size, stride=stride, padding=padding, groups=channels, bias=bias)\n self.register_buffer(\"_empty_bias\", torch.empty(0), persistent=False)\n self.stride = stride\n self.padding = padding\n def forward(self, x: torch.Tensor) -> torch.Tensor:\n b = self.conv1d.bias if self.conv1d.bias is not None else self._empty_bias\n return _ext.depthwise_conv1d_forward(x, self.conv1d.weight, b, self.stride, self.padding)\n"
}