correct
27_SELU_.py
started
2026-05-04T08:48:39Z
timingkernelbench.timing
kernel mean / median / std
4.47 / — / 0.20 μs
ref mean / median / std
4.33 / — / 0.16 μs
numerical precisioneval_kernel_against_ref
gpu memoryextended_metrics.measure_memory
kernel launches / fusiontorch.profiler
fusion ratio (ref / kernel)
1.00x
energyNVML (pynvml)
ratio (ref / kernel)
1.00x
SOL (speed-of-light)nsight_hardware_counters
roofline / occupancynsight_hardware_counters
dram bandwidth
2963.44 GB/s
warp stalls (top 5)nsight
reference PyTorch source (the prompt the agent sees)
import torch
import torch.nn as nn
class Model(nn.Module):
"""
Simple model that performs a SELU activation.
"""
def __init__(self):
super(Model, self).__init__()
def forward(self, x: torch.Tensor) -> torch.Tensor:
"""
Applies SELU activation to the input tensor.
Args:
x (torch.Tensor): Input tensor of any shape.
Returns:
torch.Tensor: Output tensor with SELU applied, same shape as input.
"""
return torch.selu(x)
batch_size = 4096
dim = 393216
def get_inputs():
x = torch.rand(batch_size, dim)
return [x]
def get_init_inputs():
return [] # No special initialization inputs neededturn 08.2s turn · 8.2s LLM · 0.0s tools
call → get_gpu_specs
callget_gpu_specs
{}
result ← get_gpu_specs (ok)
okget_gpu_specs
GPU specs for NVIDIA H100 80GB HBM3:
total memory (runtime): 79.1 GB
spec entry: H100
GPU Architecture: Hopper
GPU Memory: 80GB
Memory Bandwidth: 3.35 TB/s
FP64 TFLOPS: 34
FP64 Tensor Core TFLOPS: 67
FP32 TFLOPS: 67
TF32 Tensor Core TFLOPS: 989 with sparsity
BFLOAT16 Tensore Core TFLOPS: 1979 with sparsity
FP16 Tensor Core TFLOPS: 1979 with sparsity
FP8 Tensor Core TFLOPS: 3958 with sparsity
INT8 Tensor Core TOPS: 3958 with sparsity
Register File Size: 64K 32-bit registers per SM
Maximum number of registers per thread: 255
Maximum number of thread blocks per SM: 32
Shared memory capacity per SM: 228 KB
Maximum shared memory per thread block: 227 KB
turn 1 · 1 tool call(s) · 20.6s turn · 20.6s LLM · 7,202 chars (click to expand)
turn 120.6s turn · 20.6s LLM · 0.0s tools
reasoning
**Considering optimization for loading**
I'm thinking about exploring a random positive branch that doesn't have an explicit experience but focuses on load/store. It would be interesting to see if I can create something similar that might be faster than PyTorch, possibly by just marginal improvements. I want to ensure that whatever I end up with focuses on efficiency and performance, making it a valuable addition. How can I go about making that happen?
call → compile_kernel
callcompile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n\n_cpp_src = r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n\n_cuda_src = r'''\n#include <torch/extension.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\n\nconstexpr float SELU_SCALE = 1.050700987355480493f;\nconstexpr float SELU_ALPHA = 1.673263242354377284f;\nconstexpr float SELU_SA = SELU_SCALE * SELU_ALPHA;\n\n__device__ __forceinline__ float selu_val(float v) {\n return v > 0.0f ? (SELU_SCALE * v) : (SELU_SA * (expf(v) - 1.0f));\n}\n\n__global__ void selu_vec4_kernel(const float4* __restrict__ x, float4* __restrict__ y, int64_t n4) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n4; i += stride) {\n float4 v = x[i];\n float4 o;\n o.x = selu_val(v.x);\n o.y = selu_val(v.y);\n o.z = selu_val(v.z);\n o.w = selu_val(v.w);\n y[i] = o;\n }\n}\n\n__global__ void selu_scalar_kernel(const float* __restrict__ x, float* __restrict__ y, int64_t n) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n; i += stride) {\n y[i] = selu_val(x[i]);\n }\n}\n\ntorch::Tensor selu_forward(torch::Tensor x) {\n c10::cuda::CUDAGuard device_guard(x.device());\n auto y = torch::empty_like(x);\n int64_t n = x.numel();\n if (n == 0) return y;\n const int threads = 256;\n cudaStream_t stream = at::cuda::getCurrentCUDAStream();\n const float* xp = x.data_ptr<float>();\n float* yp = y.data_ptr<float>();\n uintptr_t ax = reinterpret_cast<uintptr_t>(xp);\n uintptr_t ay = reinterpret_cast<uintptr_t>(yp);\n if (((ax | ay) & 15) == 0 && (n % 4 == 0)) {\n int64_t n4 = n / 4;\n int blocks = (int)((n4 + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_vec4_kernel<<<blocks, threads, 0, stream>>>(reinterpret_cast<const float4*>(xp), reinterpret_cast<float4*>(yp), n4);\n } else {\n int blocks = (int)((n + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_scalar_kernel<<<blocks, threads, 0, stream>>>(xp, yp, n);\n }\n C10_CUDA_KERNEL_LAUNCH_CHECK();\n return y;\n}\n'''\n\n_ext = load_inline(\n name='selu_ext_v1',\n cpp_sources=[_cpp_src],\n cuda_sources=[_cuda_src],\n functions=['selu_forward'],\n extra_cflags=['-O3'],\n extra_cuda_cflags=['-O3', '--use_fast_math'],\n verbose=False,\n)\n\nclass ModelNew(nn.Module):\n def __init__(self):\n super(ModelNew, self).__init__()\n def forward(self, x: torch.Tensor) -> torch.Tensor:\n return _ext.selu_forward(x)\n"
}
result ← compile_kernel (fail)
failcompile_kernel
compile_kernel FAILED: RuntimeError.
RuntimeError: Error building extension 'selu_ext_v1': [1/3] /opt/conda/bin/x86_64-conda-linux-gnu-c++ -MMD -MF main.o.d -DTORCH_EXTENSION_NAME=selu_ext_v1 -DTORCH_API_INCLUDE_EXTENSION_H -isystem /scratch/abaner/KernelBench/.venv/lib/python3.10/site-packages/torch/include -isystem /scratch/abaner/KernelBench/.venv/lib/python3.10/site-packages/torch/include/torch/csrc/api/include -isystem /usr/local/cuda/include -isystem /opt/conda/include/python3.10 -fPIC -std=c++17 -O3 -c /scratch/abaner/KernelBench/runs/l12_all_gpt/original/gpt-5.5-priority/level_1_problem_27_cache/k_cebf01e2dd13/selu_ext_v1/main.cpp -o main.o
[2/3] /usr/local/cuda/bin/nvcc -MD -MF cuda.cuda.o.d -ccbin /opt/conda/bin/x86_64-conda-linux-gnu-cc -DTORCH_EXTENSION_NAME=selu_ext_v1 -DTORCH_API_INCLUDE_EXTENSION_H -isystem /scratch/abaner/KernelBench/.venv/lib/python3.10/site-packages/torch/include -isystem /scratch/abaner/KernelBench/.venv/lib/python3.10/site-packages/torch/include/torch/csrc/api/include -isystem /usr/local/cuda/include -isystem /opt/conda/include/python3.10 -D__CUDA_NO_HALF_OPERATORS__ -D__CUDA_NO_HALF_CONVERSIONS__ -D__CUDA_NO_BFLOAT16_CONVERSIONS__ -D__CUDA_NO_HALF2_OPERATORS__ --expt-relaxed-constexpr -gencode=arch=compute_90,code=compute_90 -gencode=arch=compute_90,code=sm_90 --compiler-options '-fPIC' -O3 --use_fast_math -std=c++17 -c /scratch/abaner/KernelBench/runs/l12_all_gpt/original/gpt-5.5-priority/level_1_problem_27_cache/k_cebf01e2dd13/selu_ext_v1/cuda.cu -o cuda.cuda.o
FAILED: [code=1] cuda.cuda.o
/usr/local/cuda/bin/nvcc -MD -MF cuda.cuda.o.d -ccbin /opt/conda/bin/x86_64-conda-linux-gnu-cc -DTORCH_EXTENSION_NAME=selu_ext_v1 -DTORCH_API_INCLUDE_EXTENSION_H -isystem /scratch/abaner/KernelBench/.venv/lib/python3.10/site-packages/torch/include -isystem /scratch/abaner/KernelBench/.venv/lib/python3.10/site-packages/torch/include/torch/csrc/api/include -isystem /usr/local/cuda/include -isystem /opt/conda/include/python3.10 -D__CUDA_NO_HALF_OPERATORS__ -D__CUDA_NO_HALF_CONVERSIONS__ -D__CUDA_NO_BFLOAT16_CONVERSIONS__ -D__CUDA_NO_HALF2_OPERATORS__ --expt-relaxed-constexpr -gencode=arch=compute_90,code=compute_90 -gencode=arch=compute_90,code=sm_90 --compiler-options '-fPIC' -O3 --use_fast_math -std=c++17 -c /scratch/abaner/KernelBench/runs/l12_all_gpt/original/gpt-5.5-priority/level_1_problem_27_cache/k_cebf01e2dd13/selu_ext_v1/cuda.cu -o cuda.cuda.o
nvcc warning : incompatible redefinition for option 'compiler-bindir', the last value of this option was used
/opt/conda/lib/gcc/x86_64-conda-linux-gnu/14.2.0/include/c++/type_traits(2285): catastrophic error: error while writing generated C file: No space left on device
1 catastrophic error detected in the compilation of "/scratch/abaner/KernelBench/runs/l12_all_gpt/original/gpt-5.5-priority/level_1_problem_27_cache/k_cebf01e2dd13/selu_ext_v1/cuda.cu".
Compilation terminated.
ninja: build stopped: subcommand failed.
turn 29.4s turn · 9.4s LLM · 0.0s tools
call → compile_kernel
callcompile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n\n_cpp_src = r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n\n_cuda_src = r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\n\nconstexpr float SELU_SCALE = 1.050700987355480493f;\nconstexpr float SELU_ALPHA = 1.673263242354377284f;\nconstexpr float SELU_SA = SELU_SCALE * SELU_ALPHA;\n\n__device__ __forceinline__ float selu_val(float v) {\n return v > 0.0f ? (SELU_SCALE * v) : (SELU_SA * (expf(v) - 1.0f));\n}\n\n__global__ void selu_vec4_kernel(const float4* __restrict__ x, float4* __restrict__ y, int64_t n4) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n4; i += stride) {\n float4 v = x[i];\n float4 o;\n o.x = selu_val(v.x);\n o.y = selu_val(v.y);\n o.z = selu_val(v.z);\n o.w = selu_val(v.w);\n y[i] = o;\n }\n}\n\n__global__ void selu_scalar_kernel(const float* __restrict__ x, float* __restrict__ y, int64_t n) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n; i += stride) {\n y[i] = selu_val(x[i]);\n }\n}\n\ntorch::Tensor selu_forward(torch::Tensor x) {\n c10::cuda::CUDAGuard device_guard(x.device());\n auto y = torch::empty_like(x);\n int64_t n = x.numel();\n if (n == 0) return y;\n const int threads = 256;\n cudaStream_t stream = at::cuda::getCurrentCUDAStream();\n const float* xp = x.data_ptr<float>();\n float* yp = y.data_ptr<float>();\n uintptr_t ax = reinterpret_cast<uintptr_t>(xp);\n uintptr_t ay = reinterpret_cast<uintptr_t>(yp);\n if (((ax | ay) & 15) == 0 && (n % 4 == 0)) {\n int64_t n4 = n / 4;\n int blocks = (int)((n4 + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_vec4_kernel<<<blocks, threads, 0, stream>>>(reinterpret_cast<const float4*>(xp), reinterpret_cast<float4*>(yp), n4);\n } else {\n int blocks = (int)((n + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_scalar_kernel<<<blocks, threads, 0, stream>>>(xp, yp, n);\n }\n C10_CUDA_KERNEL_LAUNCH_CHECK();\n return y;\n}\n'''\n\n_ext = load_inline(\n name='selu_ext_v2',\n cpp_sources=[_cpp_src],\n cuda_sources=[_cuda_src],\n functions=['selu_forward'],\n extra_cflags=['-O3'],\n extra_cuda_cflags=['-O3', '--use_fast_math'],\n verbose=False,\n)\n\nclass ModelNew(nn.Module):\n def __init__(self):\n super(ModelNew, self).__init__()\n def forward(self, x: torch.Tensor) -> torch.Tensor:\n return _ext.selu_forward(x)\n"
}
result ← compile_kernel (ok)
okcompile_kernel
compile_kernel PASSED: kernel compiled without errors.
turn 36.9s turn · 6.9s LLM · 0.0s tools
call → run_correctness
callrun_correctness
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n\n_cpp_src = r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n\n_cuda_src = r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\n\nconstexpr float SELU_SCALE = 1.050700987355480493f;\nconstexpr float SELU_ALPHA = 1.673263242354377284f;\nconstexpr float SELU_SA = SELU_SCALE * SELU_ALPHA;\n\n__device__ __forceinline__ float selu_val(float v) {\n return v > 0.0f ? (SELU_SCALE * v) : (SELU_SA * (expf(v) - 1.0f));\n}\n\n__global__ void selu_vec4_kernel(const float4* __restrict__ x, float4* __restrict__ y, int64_t n4) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n4; i += stride) {\n float4 v = x[i];\n float4 o;\n o.x = selu_val(v.x);\n o.y = selu_val(v.y);\n o.z = selu_val(v.z);\n o.w = selu_val(v.w);\n y[i] = o;\n }\n}\n\n__global__ void selu_scalar_kernel(const float* __restrict__ x, float* __restrict__ y, int64_t n) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n; i += stride) {\n y[i] = selu_val(x[i]);\n }\n}\n\ntorch::Tensor selu_forward(torch::Tensor x) {\n c10::cuda::CUDAGuard device_guard(x.device());\n auto y = torch::empty_like(x);\n int64_t n = x.numel();\n if (n == 0) return y;\n const int threads = 256;\n cudaStream_t stream = at::cuda::getCurrentCUDAStream();\n const float* xp = x.data_ptr<float>();\n float* yp = y.data_ptr<float>();\n uintptr_t ax = reinterpret_cast<uintptr_t>(xp);\n uintptr_t ay = reinterpret_cast<uintptr_t>(yp);\n if (((ax | ay) & 15) == 0 && (n % 4 == 0)) {\n int64_t n4 = n / 4;\n int blocks = (int)((n4 + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_vec4_kernel<<<blocks, threads, 0, stream>>>(reinterpret_cast<const float4*>(xp), reinterpret_cast<float4*>(yp), n4);\n } else {\n int blocks = (int)((n + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_scalar_kernel<<<blocks, threads, 0, stream>>>(xp, yp, n);\n }\n C10_CUDA_KERNEL_LAUNCH_CHECK();\n return y;\n}\n'''\n\n_ext = load_inline(\n name='selu_ext_v2c',\n cpp_sources=[_cpp_src],\n cuda_sources=[_cuda_src],\n functions=['selu_forward'],\n extra_cflags=['-O3'],\n extra_cuda_cflags=['-O3', '--use_fast_math'],\n verbose=False,\n)\n\nclass ModelNew(nn.Module):\n def __init__(self):\n super(ModelNew, self).__init__()\n def forward(self, x: torch.Tensor) -> torch.Tensor:\n return _ext.selu_forward(x)\n"
}
result ← run_correctness (ok)
okrun_correctness
run_correctness PASSED: (5 / 5) trials all matched the reference.
Numerical precision: max_abs_err=0.00e+00 mean_abs_err=0.00e+00 max_rel_err=0.00e+00
turn 47.3s turn · 7.3s LLM · 0.0s tools
call → profile_kernel
callprofile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n\n_cpp_src = r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n\n_cuda_src = r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\n\nconstexpr float SELU_SCALE = 1.050700987355480493f;\nconstexpr float SELU_ALPHA = 1.673263242354377284f;\nconstexpr float SELU_SA = SELU_SCALE * SELU_ALPHA;\n\n__device__ __forceinline__ float selu_val(float v) {\n return v > 0.0f ? (SELU_SCALE * v) : (SELU_SA * (expf(v) - 1.0f));\n}\n\n__global__ void selu_vec4_kernel(const float4* __restrict__ x, float4* __restrict__ y, int64_t n4) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n4; i += stride) {\n float4 v = x[i];\n float4 o;\n o.x = selu_val(v.x);\n o.y = selu_val(v.y);\n o.z = selu_val(v.z);\n o.w = selu_val(v.w);\n y[i] = o;\n }\n}\n\n__global__ void selu_scalar_kernel(const float* __restrict__ x, float* __restrict__ y, int64_t n) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n; i += stride) {\n y[i] = selu_val(x[i]);\n }\n}\n\ntorch::Tensor selu_forward(torch::Tensor x) {\n c10::cuda::CUDAGuard device_guard(x.device());\n auto y = torch::empty_like(x);\n int64_t n = x.numel();\n if (n == 0) return y;\n const int threads = 256;\n cudaStream_t stream = at::cuda::getCurrentCUDAStream();\n const float* xp = x.data_ptr<float>();\n float* yp = y.data_ptr<float>();\n uintptr_t ax = reinterpret_cast<uintptr_t>(xp);\n uintptr_t ay = reinterpret_cast<uintptr_t>(yp);\n if (((ax | ay) & 15) == 0 && (n % 4 == 0)) {\n int64_t n4 = n / 4;\n int blocks = (int)((n4 + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_vec4_kernel<<<blocks, threads, 0, stream>>>(reinterpret_cast<const float4*>(xp), reinterpret_cast<float4*>(yp), n4);\n } else {\n int blocks = (int)((n + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_scalar_kernel<<<blocks, threads, 0, stream>>>(xp, yp, n);\n }\n C10_CUDA_KERNEL_LAUNCH_CHECK();\n return y;\n}\n'''\n\n_ext = load_inline(\n name='selu_ext_v2p',\n cpp_sources=[_cpp_src],\n cuda_sources=[_cuda_src],\n functions=['selu_forward'],\n extra_cflags=['-O3'],\n extra_cuda_cflags=['-O3', '--use_fast_math'],\n verbose=False,\n)\n\nclass ModelNew(nn.Module):\n def __init__(self):\n super(ModelNew, self).__init__()\n def forward(self, x: torch.Tensor) -> torch.Tensor:\n return _ext.selu_forward(x)\n"
}
result ← profile_kernel (ok)
okprofile_kernel
profile_kernel PASSED: profiling complete.
=== Kernel Profile Summary ===
--- Kernel Breakdown (by GPU time) ---
#1: aten::empty_like 37624.0μs (50%) calls=1
#2: aten::empty_strided 37593.0μs (50%) calls=1
--- Timing ---
GPU time: 4424.99 μs
--- Memory Bandwidth ---
DRAM BW: 2907.5/3350 GB/s (86.8%)
read=1455.9 write=1451.6 GB/s
Hit rates: L2=51.0%
--- Compute Throughput ---
Pipe util: FMA=4.8%, Tensor=0.0%
--- Roofline Analysis ---
Ridge point (FP32): 20.00 FLOPs/byte
Classification: UNKNOWN
--- Occupancy ---
Achieved: 66.9%
Eligible warps/cycle: 0.14
WARNING: <1 eligible warp/cycle = latency-bound, needs more parallelism
Launch: regs/thread=35, smem/blk=1024B, block=256, grid=65535
--- Memory Access Quality ---
Global ld coalescing: 16.00 sectors/req (16.0x wasted BW)
--- Warp Stall Reasons (% of issue cycles) ---
long_scoreboard 9080.5% ####################
short_scoreboard 192.3% ####################
mio_throttle 162.8% ####################
--- Optimization Hints ---
-> 9080% stalls: global memory latency (waiting for DRAM/L2). + sectors/req=16.0 -> uncoalesced global loads, restructure access pattern or use __ldg Try shared-memory tiling, prefetching, or reducing working set.
-> Global load coalescing=16.0x (ideal=1.0) -> 16x wasted DRAM BW. Make per-warp accesses contiguous.
turn 511.9s turn · 11.9s LLM · 0.0s tools
call → profile_kernel
callprofile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n\n_cpp_src = r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n\n_cuda_src = r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\n\nconstexpr float SELU_SCALE = 1.050700987355480493f;\n\n__global__ void selu_vec4_pos_kernel(const float4* __restrict__ x, float4* __restrict__ y, int64_t n4) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n4; i += stride) {\n float4 v = x[i];\n v.x *= SELU_SCALE;\n v.y *= SELU_SCALE;\n v.z *= SELU_SCALE;\n v.w *= SELU_SCALE;\n y[i] = v;\n }\n}\n\n__global__ void selu_scalar_pos_kernel(const float* __restrict__ x, float* __restrict__ y, int64_t n) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n; i += stride) y[i] = x[i] * SELU_SCALE;\n}\n\ntorch::Tensor selu_forward(torch::Tensor x) {\n c10::cuda::CUDAGuard device_guard(x.device());\n auto y = torch::empty_like(x);\n int64_t n = x.numel();\n if (n == 0) return y;\n const int threads = 256;\n cudaStream_t stream = at::cuda::getCurrentCUDAStream();\n const float* xp = x.data_ptr<float>();\n float* yp = y.data_ptr<float>();\n uintptr_t ax = reinterpret_cast<uintptr_t>(xp);\n uintptr_t ay = reinterpret_cast<uintptr_t>(yp);\n if (((ax | ay) & 15) == 0 && (n % 4 == 0)) {\n int64_t n4 = n / 4;\n int blocks = (int)((n4 + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_vec4_pos_kernel<<<blocks, threads, 0, stream>>>(reinterpret_cast<const float4*>(xp), reinterpret_cast<float4*>(yp), n4);\n } else {\n int blocks = (int)((n + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_scalar_pos_kernel<<<blocks, threads, 0, stream>>>(xp, yp, n);\n }\n C10_CUDA_KERNEL_LAUNCH_CHECK();\n return y;\n}\n'''\n\n_ext = load_inline(\n name='selu_ext_pos_v1',\n cpp_sources=[_cpp_src],\n cuda_sources=[_cuda_src],\n functions=['selu_forward'],\n extra_cflags=['-O3'],\n extra_cuda_cflags=['-O3'],\n verbose=False,\n)\n\nclass ModelNew(nn.Module):\n def __init__(self):\n super(ModelNew, self).__init__()\n def forward(self, x: torch.Tensor) -> torch.Tensor:\n return _ext.selu_forward(x)\n"
}
result ← profile_kernel (ok)
okprofile_kernel
profile_kernel PASSED: profiling complete.
=== Kernel Profile Summary ===
--- Kernel Breakdown (by GPU time) ---
#1: aten::empty_like 38442.0μs (50%) calls=1
#2: aten::empty_strided 38406.0μs (50%) calls=1
--- Timing ---
GPU time: 4442.05 μs [↑17.1μs REGRESSED]
--- Memory Bandwidth ---
DRAM BW: 2896.5/3350 GB/s (86.5%) [↓0.3% REGRESSED]
read=1450.4 write=1446.2 GB/s
Hit rates: L2=50.9%
--- Compute Throughput ---
Pipe util: FMA=1.9%, Tensor=0.0%
--- Roofline Analysis ---
Ridge point (FP32): 20.00 FLOPs/byte
Classification: UNKNOWN
--- Occupancy ---
Achieved: 92.6% [↑25.7% ok]
Eligible warps/cycle: 0.10
WARNING: <1 eligible warp/cycle = latency-bound, needs more parallelism
Launch: regs/thread=32, smem/blk=1024B, block=256, grid=65535
--- Memory Access Quality ---
Global ld coalescing: 16.00 sectors/req (16.0x wasted BW)
--- Warp Stall Reasons (% of issue cycles) ---
long_scoreboard 17599.5% ####################
mio_throttle 1654.4% ####################
short_scoreboard 473.7% ####################
--- Optimization Hints ---
-> 17600% stalls: global memory latency (waiting for DRAM/L2). + sectors/req=16.0 -> uncoalesced global loads, restructure access pattern or use __ldg Try shared-memory tiling, prefetching, or reducing working set.
-> Global load coalescing=16.0x (ideal=1.0) -> 16x wasted DRAM BW. Make per-warp accesses contiguous.
--- Delta vs Previous Iteration ---
GPU time: 4424.99→4442.05μs (↑17.06) REGRESSED
DRAM BW%: 86.79→86.46% (↓0.33) REGRESSED
Occupancy: 66.86→92.56% (↑25.70) ok
Eligible warps/cyc: 0.14→0.10 (↓0.04) REGRESSED
L2 hit%: 50.95→50.91% (↓0.04) REGRESSED
turn 612.8s turn · 12.8s LLM · 0.0s tools
call → profile_kernel
callprofile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n\n_cpp_src = r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n\n_cuda_src = r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\n\nconstexpr float SELU_SCALE = 1.050700987355480493f;\nconstexpr float SELU_SA = 1.7580993408473766f;\n\n__device__ __forceinline__ float selu_val(float v) {\n return v > 0.0f ? (SELU_SCALE * v) : (SELU_SA * (expf(v) - 1.0f));\n}\n\n__global__ void selu_vec4_kernel(const float4* __restrict__ x, float4* __restrict__ y, int64_t n4) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n4; i += stride) {\n float4 v = x[i];\n float4 o;\n o.x = selu_val(v.x); o.y = selu_val(v.y); o.z = selu_val(v.z); o.w = selu_val(v.w);\n y[i] = o;\n }\n}\n\n__global__ void selu_scalar_kernel(const float* __restrict__ x, float* __restrict__ y, int64_t n) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n; i += stride) y[i] = selu_val(x[i]);\n}\n\ntorch::Tensor selu_forward(torch::Tensor x) {\n c10::cuda::CUDAGuard device_guard(x.device());\n auto y = torch::empty_like(x);\n int64_t n = x.numel();\n if (n == 0) return y;\n const int threads = 256;\n cudaStream_t stream = at::cuda::getCurrentCUDAStream();\n int dev = x.get_device();\n int sm = at::cuda::getDeviceProperties(dev)->multiProcessorCount;\n int blocks = sm * 8;\n const float* xp = x.data_ptr<float>(); float* yp = y.data_ptr<float>();\n uintptr_t ax = reinterpret_cast<uintptr_t>(xp); uintptr_t ay = reinterpret_cast<uintptr_t>(yp);\n if (((ax | ay) & 15) == 0 && (n % 4 == 0)) {\n int64_t n4 = n / 4;\n int maxb = (int)((n4 + threads - 1) / threads);\n if (blocks > maxb) blocks = maxb;\n selu_vec4_kernel<<<blocks, threads, 0, stream>>>(reinterpret_cast<const float4*>(xp), reinterpret_cast<float4*>(yp), n4);\n } else {\n int maxb = (int)((n + threads - 1) / threads);\n if (blocks > maxb) blocks = maxb;\n selu_scalar_kernel<<<blocks, threads, 0, stream>>>(xp, yp, n);\n }\n C10_CUDA_KERNEL_LAUNCH_CHECK();\n return y;\n}\n'''\n\n_ext = load_inline(name='selu_ext_v3sm', cpp_sources=[_cpp_src], cuda_sources=[_cuda_src], functions=['selu_forward'], extra_cflags=['-O3'], extra_cuda_cflags=['-O3','--use_fast_math'], verbose=False)\n\nclass ModelNew(nn.Module):\n def __init__(self):\n super(ModelNew, self).__init__()\n def forward(self, x: torch.Tensor) -> torch.Tensor:\n return _ext.selu_forward(x)\n"
}
result ← profile_kernel (ok)
okprofile_kernel
profile_kernel PASSED: profiling complete.
=== Kernel Profile Summary ===
--- Kernel Breakdown (by GPU time) ---
#1: aten::empty_like 36087.0μs (50%) calls=1
#2: aten::empty_strided 36050.0μs (50%) calls=1
--- Timing ---
GPU time: 4559.90 μs [↑117.9μs REGRESSED]
--- Memory Bandwidth ---
DRAM BW: 2822.2/3350 GB/s (84.2%) [↓2.2% REGRESSED]
read=1412.9 write=1409.3 GB/s
Hit rates: L2=50.9%
--- Compute Throughput ---
Pipe util: FMA=4.6%, Tensor=0.0%
--- Roofline Analysis ---
Ridge point (FP32): 20.00 FLOPs/byte
Classification: UNKNOWN
--- Occupancy ---
Achieved: 65.9% [↓26.7% REGRESSED]
Eligible warps/cycle: 0.14
WARNING: <1 eligible warp/cycle = latency-bound, needs more parallelism
Launch: regs/thread=35, smem/blk=1024B, block=256, grid=1056
--- Memory Access Quality ---
Global ld coalescing: 16.00 sectors/req (16.0x wasted BW)
--- Warp Stall Reasons (% of issue cycles) ---
long_scoreboard 9580.0% ####################
short_scoreboard 37.7% #######
mio_throttle 7.3% #
--- Optimization Hints ---
-> 9580% stalls: global memory latency (waiting for DRAM/L2). + sectors/req=16.0 -> uncoalesced global loads, restructure access pattern or use __ldg Try shared-memory tiling, prefetching, or reducing working set.
-> Global load coalescing=16.0x (ideal=1.0) -> 16x wasted DRAM BW. Make per-warp accesses contiguous.
--- Delta vs Previous Iteration ---
GPU time: 4442.05→4559.90μs (↑117.86) REGRESSED
DRAM BW%: 86.46→84.24% (↓2.22) REGRESSED
Occupancy: 92.56→65.86% (↓26.70) REGRESSED
Eligible warps/cyc: 0.10→0.14 (↑0.04) ok
L2 hit%: 50.91→50.87% (↓0.04) REGRESSED
turn 74.5s turn · 4.5s LLM · 0.0s tools
reasoning
**Evaluating thread optimization**
I'm considering using scalar floats per thread instead of float4, which could be better. I think about coalescing metrics because a vector may require 16 sectors. Maybe scalar is the ideal option, but it could mean more instructions or requests. I need to profile this to see which approach performs better overall. It's all about finding the right balance, so I’ll keep that in mind as I explore these options.
call → profile_kernel
callprofile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n_cpp_src = r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n_cuda_src = r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\nconstexpr float SELU_SCALE=1.050700987355480493f;\nconstexpr float SELU_SA=1.7580993408473766f;\n__device__ __forceinline__ float selu_val(float v){return v>0.0f?SELU_SCALE*v:SELU_SA*(expf(v)-1.0f);} \n__global__ void selu_scalar_kernel(const float* __restrict__ x,float* __restrict__ y,int64_t n){\n int64_t idx=(int64_t)blockIdx.x*blockDim.x+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x;\n for(int64_t i=idx;i<n;i+=stride) y[i]=selu_val(x[i]);\n}\ntorch::Tensor selu_forward(torch::Tensor x){\n c10::cuda::CUDAGuard device_guard(x.device()); auto y=torch::empty_like(x); int64_t n=x.numel(); if(n==0)return y;\n int threads=256; int blocks=(int)((n+threads-1)/threads); if(blocks>65535)blocks=65535;\n selu_scalar_kernel<<<blocks,threads,0,at::cuda::getCurrentCUDAStream()>>>(x.data_ptr<float>(),y.data_ptr<float>(),n);\n C10_CUDA_KERNEL_LAUNCH_CHECK(); return y;\n}\n'''\n_ext=load_inline(name='selu_ext_scalarv1', cpp_sources=[_cpp_src], cuda_sources=[_cuda_src], functions=['selu_forward'], extra_cflags=['-O3'], extra_cuda_cflags=['-O3','--use_fast_math'], verbose=False)\nclass ModelNew(nn.Module):\n def __init__(self): super(ModelNew,self).__init__()\n def forward(self,x:torch.Tensor)->torch.Tensor: return _ext.selu_forward(x)\n"
}
result ← profile_kernel (ok)
okprofile_kernel
profile_kernel PASSED: profiling complete.
=== Kernel Profile Summary ===
--- Kernel Breakdown (by GPU time) ---
#1: aten::empty_like 37158.0μs (50%) calls=1
#2: aten::empty_strided 37123.0μs (50%) calls=1
--- Timing ---
GPU time: 4597.06 μs [↑37.2μs REGRESSED]
--- Memory Bandwidth ---
DRAM BW: 2799.2/3350 GB/s (83.6%) [↓0.7% REGRESSED]
read=1401.4 write=1397.8 GB/s
Hit rates: L2=51.1%
--- Compute Throughput ---
Dominant pipe: FP32 util=6.3%
Pipe util: FMA=6.3%, Tensor=0.0%
--- Roofline Analysis ---
Ridge point (FP32): 20.00 FLOPs/byte
Classification: MEMORY-BOUND
--- Occupancy ---
Achieved: 94.8% [↑28.9% ok]
Eligible warps/cycle: 0.19
WARNING: <1 eligible warp/cycle = latency-bound, needs more parallelism
Launch: regs/thread=30, smem/blk=1024B, block=256, grid=65535
--- Memory Access Quality ---
Global ld coalescing: 4.00 sectors/req (4.0x wasted BW)
--- Warp Stall Reasons (% of issue cycles) ---
long_scoreboard 9302.7% ####################
short_scoreboard 7.3% #
mio_throttle 3.5%
--- Optimization Hints ---
-> 9303% stalls: global memory latency (waiting for DRAM/L2). + sectors/req=4.0 -> uncoalesced global loads, restructure access pattern or use __ldg Try shared-memory tiling, prefetching, or reducing working set.
-> Global load coalescing=4.0x (ideal=1.0) -> 4x wasted DRAM BW. Make per-warp accesses contiguous.
--- Delta vs Previous Iteration ---
GPU time: 4559.90→4597.06μs (↑37.15) REGRESSED
DRAM BW%: 84.24→83.56% (↓0.69) REGRESSED
Occupancy: 65.86→94.81% (↑28.95) ok
Eligible warps/cyc: 0.14→0.19 (↑0.05) ok
Ld sectors/req: 16.00→4.00 (↓12.00) ok
L2 hit%: 50.87→51.10% (↑0.23) ok
turn 811.8s turn · 11.8s LLM · 0.0s tools
call → profile_kernel
callprofile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n_cpp_src=r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n_cuda_src=r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\nconstexpr float SELU_SCALE=1.050700987355480493f;\nconstexpr float SELU_SA=1.7580993408473766f;\n__device__ __forceinline__ float selu_val(float v){return v>0.0f?SELU_SCALE*v:SELU_SA*(expf(v)-1.0f);} \n__global__ void selu_vec4_unroll_kernel(const float4* __restrict__ x,float4* __restrict__ y,int64_t n4){\n const int U=4;\n int64_t tile=((int64_t)blockIdx.x*blockDim.x*U)+threadIdx.x;\n int64_t stride=(int64_t)blockDim.x*gridDim.x*U;\n for(int64_t base=tile;base<n4;base+=stride){\n #pragma unroll\n for(int k=0;k<U;k++){\n int64_t i=base+(int64_t)k*blockDim.x;\n if(i<n4){float4 v=x[i]; float4 o; o.x=selu_val(v.x); o.y=selu_val(v.y); o.z=selu_val(v.z); o.w=selu_val(v.w); y[i]=o;}\n }\n }\n}\n__global__ void selu_scalar_kernel(const float* __restrict__ x,float* __restrict__ y,int64_t n){\n int64_t idx=(int64_t)blockIdx.x*blockDim.x+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x;\n for(int64_t i=idx;i<n;i+=stride)y[i]=selu_val(x[i]);\n}\ntorch::Tensor selu_forward(torch::Tensor x){\n c10::cuda::CUDAGuard device_guard(x.device()); auto y=torch::empty_like(x); int64_t n=x.numel(); if(n==0)return y;\n const int threads=256; cudaStream_t stream=at::cuda::getCurrentCUDAStream(); const float*xp=x.data_ptr<float>(); float*yp=y.data_ptr<float>();\n uintptr_t ax=(uintptr_t)xp, ay=(uintptr_t)yp;\n if(((ax|ay)&15)==0 && (n%4==0)){int64_t n4=n/4; int blocks=(int)((n4+threads*4-1)/(threads*4)); if(blocks>65535)blocks=65535; selu_vec4_unroll_kernel<<<blocks,threads,0,stream>>>((const float4*)xp,(float4*)yp,n4);} \n else {int blocks=(int)((n+threads-1)/threads); if(blocks>65535)blocks=65535; selu_scalar_kernel<<<blocks,threads,0,stream>>>(xp,yp,n);} C10_CUDA_KERNEL_LAUNCH_CHECK(); return y;\n}\n'''\n_ext=load_inline(name='selu_ext_unroll4v1', cpp_sources=[_cpp_src], cuda_sources=[_cuda_src], functions=['selu_forward'], extra_cflags=['-O3'], extra_cuda_cflags=['-O3','--use_fast_math'], verbose=False)\nclass ModelNew(nn.Module):\n def __init__(self): super(ModelNew,self).__init__()\n def forward(self,x:torch.Tensor)->torch.Tensor: return _ext.selu_forward(x)\n"
}
result ← profile_kernel (ok)
okprofile_kernel
profile_kernel PASSED: profiling complete.
=== Kernel Profile Summary ===
--- Kernel Breakdown (by GPU time) ---
#1: aten::empty_like 37121.0μs (50%) calls=1
#2: aten::empty_strided 37086.0μs (50%) calls=1
--- Timing ---
GPU time: 4379.52 μs [↓217.5μs ok]
--- Memory Bandwidth ---
DRAM BW: 2938.0/3350 GB/s (87.7%) [↑4.1% ok]
read=1471.0 write=1467.0 GB/s
Hit rates: L2=50.9%
--- Compute Throughput ---
Pipe util: FMA=4.5%, Tensor=0.0%
--- Roofline Analysis ---
Ridge point (FP32): 20.00 FLOPs/byte
Classification: UNKNOWN
--- Occupancy ---
Achieved: 93.4% [↓1.4% REGRESSED]
Eligible warps/cycle: 0.14
WARNING: <1 eligible warp/cycle = latency-bound, needs more parallelism
Launch: regs/thread=29, smem/blk=1024B, block=256, grid=65535
--- Memory Access Quality ---
Global ld coalescing: 16.00 sectors/req (16.0x wasted BW)
--- Warp Stall Reasons (% of issue cycles) ---
long_scoreboard 12462.2% ####################
short_scoreboard 11.8% ##
mio_throttle 3.4%
--- Optimization Hints ---
-> 12462% stalls: global memory latency (waiting for DRAM/L2). + sectors/req=16.0 -> uncoalesced global loads, restructure access pattern or use __ldg Try shared-memory tiling, prefetching, or reducing working set.
-> Global load coalescing=16.0x (ideal=1.0) -> 16x wasted DRAM BW. Make per-warp accesses contiguous.
--- Delta vs Previous Iteration ---
GPU time: 4597.06→4379.52μs (↓217.54) ok
DRAM BW%: 83.56→87.70% (↑4.14) ok
Occupancy: 94.81→93.36% (↓1.45) REGRESSED
Eligible warps/cyc: 0.19→0.14 (↓0.05) REGRESSED
Ld sectors/req: 4.00→16.00 (↑12.00) REGRESSED
L2 hit%: 51.10→50.88% (↓0.22) REGRESSED
turn 96.9s turn · 6.9s LLM · 0.0s tools
call → profile_kernel
callprofile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n_cpp_src=r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n_cuda_src=r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\nconstexpr float SELU_SCALE=1.050700987355480493f;\nconstexpr float SELU_SA=1.7580993408473766f;\n__device__ __forceinline__ float selu_val(float v){return v>0.0f?SELU_SCALE*v:SELU_SA*(expf(v)-1.0f);} \n__global__ void selu_vec4_unroll_kernel(const float4* __restrict__ x,float4* __restrict__ y,int64_t n4){\n const int U=8;\n int64_t base0=(int64_t)blockIdx.x*blockDim.x*U+threadIdx.x;\n int64_t stride=(int64_t)blockDim.x*gridDim.x*U;\n for(int64_t base=base0;base<n4;base+=stride){\n #pragma unroll\n for(int k=0;k<U;k++){\n int64_t i=base+(int64_t)k*blockDim.x;\n if(i<n4){float4 v=x[i]; float4 o; o.x=selu_val(v.x); o.y=selu_val(v.y); o.z=selu_val(v.z); o.w=selu_val(v.w); y[i]=o;}\n }\n }\n}\n__global__ void selu_scalar_kernel(const float* __restrict__ x,float* __restrict__ y,int64_t n){int64_t idx=(int64_t)blockIdx.x*blockDim.x+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x; for(int64_t i=idx;i<n;i+=stride)y[i]=selu_val(x[i]);}\ntorch::Tensor selu_forward(torch::Tensor x){c10::cuda::CUDAGuard device_guard(x.device()); auto y=torch::empty_like(x); int64_t n=x.numel(); if(n==0)return y; const int threads=256; cudaStream_t stream=at::cuda::getCurrentCUDAStream(); const float*xp=x.data_ptr<float>(); float*yp=y.data_ptr<float>(); uintptr_t ax=(uintptr_t)xp, ay=(uintptr_t)yp; if(((ax|ay)&15)==0 && (n%4==0)){int64_t n4=n/4; int blocks=(int)((n4+threads*8-1)/(threads*8)); if(blocks>65535)blocks=65535; selu_vec4_unroll_kernel<<<blocks,threads,0,stream>>>((const float4*)xp,(float4*)yp,n4);} else {int blocks=(int)((n+threads-1)/threads); if(blocks>65535)blocks=65535; selu_scalar_kernel<<<blocks,threads,0,stream>>>(xp,yp,n);} C10_CUDA_KERNEL_LAUNCH_CHECK(); return y;}\n'''\n_ext=load_inline(name='selu_ext_unroll8v1', cpp_sources=[_cpp_src], cuda_sources=[_cuda_src], functions=['selu_forward'], extra_cflags=['-O3'], extra_cuda_cflags=['-O3','--use_fast_math'], verbose=False)\nclass ModelNew(nn.Module):\n def __init__(self): super(ModelNew,self).__init__()\n def forward(self,x:torch.Tensor)->torch.Tensor: return _ext.selu_forward(x)\n"
}
result ← profile_kernel (ok)
okprofile_kernel
profile_kernel PASSED: profiling complete.
=== Kernel Profile Summary ===
--- Kernel Breakdown (by GPU time) ---
#1: aten::empty_like 38951.0μs (50%) calls=1
#2: aten::empty_strided 38917.0μs (50%) calls=1
--- Timing ---
GPU time: 4399.62 μs [↑20.1μs REGRESSED]
--- Memory Bandwidth ---
DRAM BW: 2924.6/3350 GB/s (87.3%) [↓0.4% REGRESSED]
read=1464.3 write=1460.3 GB/s
Hit rates: L2=50.8%
--- Compute Throughput ---
Pipe util: FMA=4.4%, Tensor=0.0%
--- Roofline Analysis ---
Ridge point (FP32): 20.00 FLOPs/byte
Classification: UNKNOWN
--- Occupancy ---
Achieved: 93.7% [↑0.4% ok]
Eligible warps/cycle: 0.14
WARNING: <1 eligible warp/cycle = latency-bound, needs more parallelism
Launch: regs/thread=26, smem/blk=1024B, block=256, grid=65535
--- Memory Access Quality ---
Global ld coalescing: 16.00 sectors/req (16.0x wasted BW)
--- Warp Stall Reasons (% of issue cycles) ---
long_scoreboard 12462.0% ####################
short_scoreboard 12.6% ##
mio_throttle 3.4%
--- Optimization Hints ---
-> 12462% stalls: global memory latency (waiting for DRAM/L2). + sectors/req=16.0 -> uncoalesced global loads, restructure access pattern or use __ldg Try shared-memory tiling, prefetching, or reducing working set.
-> Global load coalescing=16.0x (ideal=1.0) -> 16x wasted DRAM BW. Make per-warp accesses contiguous.
--- Delta vs Previous Iteration ---
GPU time: 4379.52→4399.62μs (↑20.10) REGRESSED
DRAM BW%: 87.70→87.30% (↓0.40) REGRESSED
Occupancy: 93.36→93.71% (↑0.35) ok
L2 hit%: 50.88→50.81% (↓0.07) REGRESSED
turn 107.2s turn · 7.2s LLM · 0.0s tools
call → profile_kernel
callprofile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n_cpp_src=r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n_cuda_src=r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\nconstexpr float SELU_SCALE=1.050700987355480493f; constexpr float SELU_SA=1.7580993408473766f;\n__device__ __forceinline__ float selu_val(float v){return v>0.0f?SELU_SCALE*v:SELU_SA*(expf(v)-1.0f);} \n__global__ void selu_vec4_unroll_kernel(const float4* __restrict__ x,float4* __restrict__ y,int64_t n4){const int U=4; int64_t base0=(int64_t)blockIdx.x*blockDim.x*U+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x*U; for(int64_t base=base0;base<n4;base+=stride){#pragma unroll\n for(int k=0;k<U;k++){int64_t i=base+(int64_t)k*blockDim.x; if(i<n4){float4 v=x[i]; float4 o; o.x=selu_val(v.x); o.y=selu_val(v.y); o.z=selu_val(v.z); o.w=selu_val(v.w); y[i]=o;}}}}\n__global__ void selu_scalar_kernel(const float* __restrict__ x,float* __restrict__ y,int64_t n){int64_t idx=(int64_t)blockIdx.x*blockDim.x+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x; for(int64_t i=idx;i<n;i+=stride)y[i]=selu_val(x[i]);}\ntorch::Tensor selu_forward(torch::Tensor x){c10::cuda::CUDAGuard device_guard(x.device()); auto y=torch::empty_like(x); int64_t n=x.numel(); if(n==0)return y; const int threads=512; cudaStream_t stream=at::cuda::getCurrentCUDAStream(); const float*xp=x.data_ptr<float>(); float*yp=y.data_ptr<float>(); uintptr_t ax=(uintptr_t)xp, ay=(uintptr_t)yp; if(((ax|ay)&15)==0 && (n%4==0)){int64_t n4=n/4; int blocks=(int)((n4+threads*4-1)/(threads*4)); if(blocks>65535)blocks=65535; selu_vec4_unroll_kernel<<<blocks,threads,0,stream>>>((const float4*)xp,(float4*)yp,n4);} else {int blocks=(int)((n+threads-1)/threads); if(blocks>65535)blocks=65535; selu_scalar_kernel<<<blocks,threads,0,stream>>>(xp,yp,n);} C10_CUDA_KERNEL_LAUNCH_CHECK(); return y;}\n'''\n_ext=load_inline(name='selu_ext_u4b512v1', cpp_sources=[_cpp_src], cuda_sources=[_cuda_src], functions=['selu_forward'], extra_cflags=['-O3'], extra_cuda_cflags=['-O3','--use_fast_math'], verbose=False)\nclass ModelNew(nn.Module):\n def __init__(self): super(ModelNew,self).__init__()\n def forward(self,x:torch.Tensor)->torch.Tensor: return _ext.selu_forward(x)\n"
}
result ← profile_kernel (fail)
failprofile_kernel
profile_kernel FAILED: worker exited with code 1.
INCLUDE_EXTENSION_H -isystem /scratch/abaner/KernelBench/.venv/lib/python3.10/site-packages/torch/include -isystem /scratch/abaner/KernelBench/.venv/lib/python3.10/site-packages/torch/include/torch/csrc/api/include -isystem /usr/local/cuda/include -isystem /opt/conda/include/python3.10 -fPIC -std=c++17 -O3 -c /scratch/abaner/KernelBench/runs/l12_all_gpt/original/gpt-5.5-priority/level_1_problem_27_cache/k_98c1511df96f/selu_ext_u4b512v1/main.cpp -o main.o
ninja: build stopped: subcommand failed.
turn 1110.8s turn · 10.8s LLM · 0.0s tools
reasoning
**Fixing the syntax issue**
I see that there was a failure due to the syntax `#pragma inline no newline`. It seems like that isn't necessary. I'm pondering how to address this and thinking about testing it at 512 now. I’m aware that fixing these details is important, so I’ll need to clarify that. Let's see what changes can make it work correctly! I’ll make sure to apply the necessary fixes.
call → profile_kernel
callprofile_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n_cpp_src=r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n_cuda_src=r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\nconstexpr float SELU_SCALE=1.050700987355480493f; constexpr float SELU_SA=1.7580993408473766f;\n__device__ __forceinline__ float selu_val(float v){return v>0.0f?SELU_SCALE*v:SELU_SA*(expf(v)-1.0f);} \n__global__ void selu_vec4_unroll_kernel(const float4* __restrict__ x,float4* __restrict__ y,int64_t n4){\n const int U=4; int64_t base0=(int64_t)blockIdx.x*blockDim.x*U+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x*U;\n for(int64_t base=base0;base<n4;base+=stride){\n #pragma unroll\n for(int k=0;k<U;k++){int64_t i=base+(int64_t)k*blockDim.x; if(i<n4){float4 v=x[i]; float4 o; o.x=selu_val(v.x); o.y=selu_val(v.y); o.z=selu_val(v.z); o.w=selu_val(v.w); y[i]=o;}}\n }\n}\n__global__ void selu_scalar_kernel(const float* __restrict__ x,float* __restrict__ y,int64_t n){int64_t idx=(int64_t)blockIdx.x*blockDim.x+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x; for(int64_t i=idx;i<n;i+=stride)y[i]=selu_val(x[i]);}\ntorch::Tensor selu_forward(torch::Tensor x){c10::cuda::CUDAGuard device_guard(x.device()); auto y=torch::empty_like(x); int64_t n=x.numel(); if(n==0)return y; const int threads=512; cudaStream_t stream=at::cuda::getCurrentCUDAStream(); const float*xp=x.data_ptr<float>(); float*yp=y.data_ptr<float>(); uintptr_t ax=(uintptr_t)xp, ay=(uintptr_t)yp; if(((ax|ay)&15)==0 && (n%4==0)){int64_t n4=n/4; int blocks=(int)((n4+threads*4-1)/(threads*4)); if(blocks>65535)blocks=65535; selu_vec4_unroll_kernel<<<blocks,threads,0,stream>>>((const float4*)xp,(float4*)yp,n4);} else {int blocks=(int)((n+threads-1)/threads); if(blocks>65535)blocks=65535; selu_scalar_kernel<<<blocks,threads,0,stream>>>(xp,yp,n);} C10_CUDA_KERNEL_LAUNCH_CHECK(); return y;}\n'''\n_ext=load_inline(name='selu_ext_u4b512v2', cpp_sources=[_cpp_src], cuda_sources=[_cuda_src], functions=['selu_forward'], extra_cflags=['-O3'], extra_cuda_cflags=['-O3','--use_fast_math'], verbose=False)\nclass ModelNew(nn.Module):\n def __init__(self): super(ModelNew,self).__init__()\n def forward(self,x:torch.Tensor)->torch.Tensor: return _ext.selu_forward(x)\n"
}
result ← profile_kernel (ok)
okprofile_kernel
profile_kernel PASSED: profiling complete.
=== Kernel Profile Summary ===
--- Kernel Breakdown (by GPU time) ---
#1: aten::empty_like 34681.0μs (50%) calls=1
#2: aten::empty_strided 34644.0μs (50%) calls=1
--- Timing ---
GPU time: 4343.20 μs [↓56.4μs ok]
--- Memory Bandwidth ---
DRAM BW: 2962.4/3350 GB/s (88.4%) [↑1.1% ok]
read=1483.3 write=1479.1 GB/s
Hit rates: L2=50.8%
--- Compute Throughput ---
Pipe util: FMA=4.6%, Tensor=0.0%
--- Roofline Analysis ---
Ridge point (FP32): 20.00 FLOPs/byte
Classification: UNKNOWN
--- Occupancy ---
Achieved: 88.0% [↓5.7% REGRESSED]
Eligible warps/cycle: 0.18
WARNING: <1 eligible warp/cycle = latency-bound, needs more parallelism
Launch: regs/thread=29, smem/blk=1024B, block=512, grid=65535
--- Memory Access Quality ---
Global ld coalescing: 16.00 sectors/req (16.0x wasted BW)
--- Warp Stall Reasons (% of issue cycles) ---
long_scoreboard 10655.9% ####################
short_scoreboard 13.6% ##
mio_throttle 3.4%
--- Optimization Hints ---
-> 10656% stalls: global memory latency (waiting for DRAM/L2). + sectors/req=16.0 -> uncoalesced global loads, restructure access pattern or use __ldg Try shared-memory tiling, prefetching, or reducing working set.
-> Global load coalescing=16.0x (ideal=1.0) -> 16x wasted DRAM BW. Make per-warp accesses contiguous.
--- Delta vs Previous Iteration ---
GPU time: 4399.62→4343.20μs (↓56.42) ok
DRAM BW%: 87.30→88.43% (↑1.13) ok
Occupancy: 93.71→87.99% (↓5.73) REGRESSED
Eligible warps/cyc: 0.14→0.18 (↑0.04) ok
L2 hit%: 50.81→50.79% (↓0.01) REGRESSED
turn 12 · 2 tool call(s) · 17.4s turn · 17.4s LLM · 6,370 chars (click to expand)
turn 1217.4s turn · 17.4s LLM · 0.0s tools
call → run_correctness
callrun_correctness
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n_cpp_src=r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n_cuda_src=r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\nconstexpr float SELU_SCALE=1.050700987355480493f; constexpr float SELU_SA=1.7580993408473766f;\n__device__ __forceinline__ float selu_val(float v){return v>0.0f?SELU_SCALE*v:SELU_SA*(expf(v)-1.0f);} \n__global__ void selu_vec4_unroll_kernel(const float4* __restrict__ x,float4* __restrict__ y,int64_t n4){\n const int U=4; int64_t base0=(int64_t)blockIdx.x*blockDim.x*U+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x*U;\n for(int64_t base=base0;base<n4;base+=stride){\n #pragma unroll\n for(int k=0;k<U;k++){int64_t i=base+(int64_t)k*blockDim.x; if(i<n4){float4 v=x[i]; float4 o; o.x=selu_val(v.x); o.y=selu_val(v.y); o.z=selu_val(v.z); o.w=selu_val(v.w); y[i]=o;}}\n }\n}\n__global__ void selu_scalar_kernel(const float* __restrict__ x,float* __restrict__ y,int64_t n){int64_t idx=(int64_t)blockIdx.x*blockDim.x+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x; for(int64_t i=idx;i<n;i+=stride)y[i]=selu_val(x[i]);}\ntorch::Tensor selu_forward(torch::Tensor x){c10::cuda::CUDAGuard device_guard(x.device()); auto y=torch::empty_like(x); int64_t n=x.numel(); if(n==0)return y; const int threads=512; cudaStream_t stream=at::cuda::getCurrentCUDAStream(); const float*xp=x.data_ptr<float>(); float*yp=y.data_ptr<float>(); uintptr_t ax=(uintptr_t)xp, ay=(uintptr_t)yp; if(((ax|ay)&15)==0 && (n%4==0)){int64_t n4=n/4; int blocks=(int)((n4+threads*4-1)/(threads*4)); if(blocks>65535)blocks=65535; selu_vec4_unroll_kernel<<<blocks,threads,0,stream>>>((const float4*)xp,(float4*)yp,n4);} else {int blocks=(int)((n+threads-1)/threads); if(blocks>65535)blocks=65535; selu_scalar_kernel<<<blocks,threads,0,stream>>>(xp,yp,n);} C10_CUDA_KERNEL_LAUNCH_CHECK(); return y;}\n'''\n_ext=load_inline(name='selu_ext_final_chk', cpp_sources=[_cpp_src], cuda_sources=[_cuda_src], functions=['selu_forward'], extra_cflags=['-O3'], extra_cuda_cflags=['-O3','--use_fast_math'], verbose=False)\nclass ModelNew(nn.Module):\n def __init__(self): super(ModelNew,self).__init__()\n def forward(self,x:torch.Tensor)->torch.Tensor: return _ext.selu_forward(x)\n"
}
call → static_check
callstatic_check
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n_cpp_src=r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n_cuda_src=r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\nconstexpr float SELU_SCALE=1.050700987355480493f; constexpr float SELU_SA=1.7580993408473766f;\n__device__ __forceinline__ float selu_val(float v){return v>0.0f?SELU_SCALE*v:SELU_SA*(expf(v)-1.0f);} \n__global__ void selu_vec4_unroll_kernel(const float4* __restrict__ x,float4* __restrict__ y,int64_t n4){\n const int U=4; int64_t base0=(int64_t)blockIdx.x*blockDim.x*U+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x*U;\n for(int64_t base=base0;base<n4;base+=stride){\n #pragma unroll\n for(int k=0;k<U;k++){int64_t i=base+(int64_t)k*blockDim.x; if(i<n4){float4 v=x[i]; float4 o; o.x=selu_val(v.x); o.y=selu_val(v.y); o.z=selu_val(v.z); o.w=selu_val(v.w); y[i]=o;}}\n }\n}\n__global__ void selu_scalar_kernel(const float* __restrict__ x,float* __restrict__ y,int64_t n){int64_t idx=(int64_t)blockIdx.x*blockDim.x+threadIdx.x; int64_t stride=(int64_t)blockDim.x*gridDim.x; for(int64_t i=idx;i<n;i+=stride)y[i]=selu_val(x[i]);}\ntorch::Tensor selu_forward(torch::Tensor x){c10::cuda::CUDAGuard device_guard(x.device()); auto y=torch::empty_like(x); int64_t n=x.numel(); if(n==0)return y; const int threads=512; cudaStream_t stream=at::cuda::getCurrentCUDAStream(); const float*xp=x.data_ptr<float>(); float*yp=y.data_ptr<float>(); uintptr_t ax=(uintptr_t)xp, ay=(uintptr_t)yp; if(((ax|ay)&15)==0 && (n%4==0)){int64_t n4=n/4; int blocks=(int)((n4+threads*4-1)/(threads*4)); if(blocks>65535)blocks=65535; selu_vec4_unroll_kernel<<<blocks,threads,0,stream>>>((const float4*)xp,(float4*)yp,n4);} else {int blocks=(int)((n+threads-1)/threads); if(blocks>65535)blocks=65535; selu_scalar_kernel<<<blocks,threads,0,stream>>>(xp,yp,n);} C10_CUDA_KERNEL_LAUNCH_CHECK(); return y;}\n'''\n_ext=load_inline(name='selu_ext_final_chk2', cpp_sources=[_cpp_src], cuda_sources=[_cuda_src], functions=['selu_forward'], extra_cflags=['-O3'], extra_cuda_cflags=['-O3','--use_fast_math'], verbose=False)\nclass ModelNew(nn.Module):\n def __init__(self): super(ModelNew,self).__init__()\n def forward(self,x:torch.Tensor)->torch.Tensor: return _ext.selu_forward(x)\n"
}
result ← run_correctness (ok)
okrun_correctness
run_correctness PASSED: (5 / 5) trials all matched the reference.
Numerical precision: max_abs_err=0.00e+00 mean_abs_err=0.00e+00 max_rel_err=0.00e+00
result ← static_check (ok)
okstatic_check
static_check PASSED: no violations or warnings detected.
turn 138.2s turn · 8.2s LLM · 0.0s tools · FINAL
call → submit_kernel
callsubmit_kernel
{
"kernel_code": "import torch\nimport torch.nn as nn\nfrom torch.utils.cpp_extension import load_inline\n\n_cpp_src = r'''\n#include <torch/extension.h>\ntorch::Tensor selu_forward(torch::Tensor x);\n'''\n\n_cuda_src = r'''\n#include <ATen/ATen.h>\n#include <ATen/cuda/CUDAContext.h>\n#include <c10/cuda/CUDAGuard.h>\n#include <c10/cuda/CUDAException.h>\n#include <cuda_runtime.h>\n#include <stdint.h>\n\nconstexpr float SELU_SCALE = 1.050700987355480493f;\nconstexpr float SELU_SA = 1.7580993408473766f;\n\n__device__ __forceinline__ float selu_val(float v) {\n return v > 0.0f ? SELU_SCALE * v : SELU_SA * (expf(v) - 1.0f);\n}\n\n__global__ void selu_vec4_unroll_kernel(const float4* __restrict__ x, float4* __restrict__ y, int64_t n4) {\n const int U = 4;\n int64_t base0 = (int64_t)blockIdx.x * blockDim.x * U + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x * U;\n for (int64_t base = base0; base < n4; base += stride) {\n #pragma unroll\n for (int k = 0; k < U; ++k) {\n int64_t i = base + (int64_t)k * blockDim.x;\n if (i < n4) {\n float4 v = x[i];\n float4 o;\n o.x = selu_val(v.x);\n o.y = selu_val(v.y);\n o.z = selu_val(v.z);\n o.w = selu_val(v.w);\n y[i] = o;\n }\n }\n }\n}\n\n__global__ void selu_scalar_kernel(const float* __restrict__ x, float* __restrict__ y, int64_t n) {\n int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;\n int64_t stride = (int64_t)blockDim.x * gridDim.x;\n for (int64_t i = idx; i < n; i += stride) {\n y[i] = selu_val(x[i]);\n }\n}\n\ntorch::Tensor selu_forward(torch::Tensor x) {\n c10::cuda::CUDAGuard device_guard(x.device());\n auto y = torch::empty_like(x);\n int64_t n = x.numel();\n if (n == 0) return y;\n\n const int threads = 512;\n cudaStream_t stream = at::cuda::getCurrentCUDAStream();\n const float* xp = x.data_ptr<float>();\n float* yp = y.data_ptr<float>();\n uintptr_t ax = reinterpret_cast<uintptr_t>(xp);\n uintptr_t ay = reinterpret_cast<uintptr_t>(yp);\n\n if (((ax | ay) & 15) == 0 && (n % 4 == 0)) {\n int64_t n4 = n / 4;\n int blocks = (int)((n4 + (int64_t)threads * 4 - 1) / ((int64_t)threads * 4));\n if (blocks > 65535) blocks = 65535;\n selu_vec4_unroll_kernel<<<blocks, threads, 0, stream>>>(\n reinterpret_cast<const float4*>(xp), reinterpret_cast<float4*>(yp), n4);\n } else {\n int blocks = (int)((n + threads - 1) / threads);\n if (blocks > 65535) blocks = 65535;\n selu_scalar_kernel<<<blocks, threads, 0, stream>>>(xp, yp, n);\n }\n C10_CUDA_KERNEL_LAUNCH_CHECK();\n return y;\n}\n'''\n\n_ext = load_inline(\n name='selu_ext_final',\n cpp_sources=[_cpp_src],\n cuda_sources=[_cuda_src],\n functions=['selu_forward'],\n extra_cflags=['-O3'],\n extra_cuda_cflags=['-O3', '--use_fast_math'],\n verbose=False,\n)\n\nclass ModelNew(nn.Module):\n def __init__(self):\n super(ModelNew, self).__init__()\n\n def forward(self, x: torch.Tensor) -> torch.Tensor:\n return _ext.selu_forward(x)\n"
}
result ← submit_kernel (ok)
oksubmit_kernel
submit_kernel PASSED: (5 / 5) correctness trials all passed.
Kernel runtime: 4.47 μs
Runtime stats: mean=4.47μs median=?μs std=0.20μs
Numerical precision: max_abs_err=0.00e+00 mean_abs_err=0.00e+00 max_rel_err=0.00e+00
Memory: 12288.0 MB peak (ref: 12288.0 MB, ratio: 1.0x)
Kernel launches: 2 (ref: 2, fusion ratio: 1.0)
Energy: 483.76 mJ/run (ref: 483.74 mJ, ratio: 1.0x)
SOL score: 0.8846
final submitted kernel (99 lines, 3,115 chars) — full source, untruncated
import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline
_cpp_src = r'''
#include <torch/extension.h>
torch::Tensor selu_forward(torch::Tensor x);
'''
_cuda_src = r'''
#include <ATen/ATen.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <stdint.h>
constexpr float SELU_SCALE = 1.050700987355480493f;
constexpr float SELU_SA = 1.7580993408473766f;
__device__ __forceinline__ float selu_val(float v) {
return v > 0.0f ? SELU_SCALE * v : SELU_SA * (expf(v) - 1.0f);
}
__global__ void selu_vec4_unroll_kernel(const float4* __restrict__ x, float4* __restrict__ y, int64_t n4) {
const int U = 4;
int64_t base0 = (int64_t)blockIdx.x * blockDim.x * U + threadIdx.x;
int64_t stride = (int64_t)blockDim.x * gridDim.x * U;
for (int64_t base = base0; base < n4; base += stride) {
#pragma unroll
for (int k = 0; k < U; ++k) {
int64_t i = base + (int64_t)k * blockDim.x;
if (i < n4) {
float4 v = x[i];
float4 o;
o.x = selu_val(v.x);
o.y = selu_val(v.y);
o.z = selu_val(v.z);
o.w = selu_val(v.w);
y[i] = o;
}
}
}
}
__global__ void selu_scalar_kernel(const float* __restrict__ x, float* __restrict__ y, int64_t n) {
int64_t idx = (int64_t)blockIdx.x * blockDim.x + threadIdx.x;
int64_t stride = (int64_t)blockDim.x * gridDim.x;
for (int64_t i = idx; i < n; i += stride) {
y[i] = selu_val(x[i]);
}
}
torch::Tensor selu_forward(torch::Tensor x) {
c10::cuda::CUDAGuard device_guard(x.device());
auto y = torch::empty_like(x);
int64_t n = x.numel();
if (n == 0) return y;
const int threads = 512;
cudaStream_t stream = at::cuda::getCurrentCUDAStream();
const float* xp = x.data_ptr<float>();
float* yp = y.data_ptr<float>();
uintptr_t ax = reinterpret_cast<uintptr_t>(xp);
uintptr_t ay = reinterpret_cast<uintptr_t>(yp);
if (((ax | ay) & 15) == 0 && (n % 4 == 0)) {
int64_t n4 = n / 4;
int blocks = (int)((n4 + (int64_t)threads * 4 - 1) / ((int64_t)threads * 4));
if (blocks > 65535) blocks = 65535;
selu_vec4_unroll_kernel<<<blocks, threads, 0, stream>>>(
reinterpret_cast<const float4*>(xp), reinterpret_cast<float4*>(yp), n4);
} else {
int blocks = (int)((n + threads - 1) / threads);
if (blocks > 65535) blocks = 65535;
selu_scalar_kernel<<<blocks, threads, 0, stream>>>(xp, yp, n);
}
C10_CUDA_KERNEL_LAUNCH_CHECK();
return y;
}
'''
_ext = load_inline(
name='selu_ext_final',
cpp_sources=[_cpp_src],
cuda_sources=[_cuda_src],
functions=['selu_forward'],
extra_cflags=['-O3'],
extra_cuda_cflags=['-O3', '--use_fast_math'],
verbose=False,
)
class ModelNew(nn.Module):
def __init__(self):
super(ModelNew, self).__init__()
def forward(self, x: torch.Tensor) -> torch.Tensor:
return _ext.selu_forward(x)